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Biography


I have completed my Ph.D. in Electrical & Computer Engineering at Lehigh University under Xiaochen Guo, from Computer Architecture Lab (CAL) Group. I completed my master’s degree in Electrical Engineering from the University of Rochester in 2018 and my bachelor’s degree in Electronics Engineering from Mumbai University in 2016. My research focused on computer architecture, specifically microarchitecture and cache optimizations like prefetchers and software-managed cache.

You can find my resume here.

Publications


SPX64: A Scratchpad Memory for General-Purpose Microprocessors, Abhishek Singh, Shail Dave, PanteA Zardoshti, Robert Brotzman, Chao Zhang, Xiaochen Guo, Aviral Shrivastava, Gang Tan, and Michael Spear, Transactions on Architecture and Code Optimization (TACO), Dec. 2020. (Also presented at HiPEAC’21)

SPX64 Microarchitecture Design

An In-Memory Analog Computing Co-Processor for Energy-Efficient CNN Inference on Mobile Devices, M. Elbtity, A. Singh, B. Reidy, X. Guo, and R. Zand,  ISVLSI’21 (BEST PAPER AWARD)

   Heterogeneous CPU-IMAC data flow architecture

HIRAC: A Hierarchical Accelerator with Sorting-based Packing for SpGEMMs in DNN Applications, Hesam Shabani, Abhishek Singh, Bishoy Youhana, Xiaochen Guo, 2023 IEEE International Symposium on High Performance Computer Architecture. (HPCA’23)

 HiRAC architecture overview

Poster


An In-Memory Analog Computing Co-Processor for Deep Learning at the Edge, Abhishek Singh, Brendan C. Reidy, Xiaochen Guo, and Ramtin Zand, IBM IEEE CAS/EDS AI Compute Symposium (AICS), Oct.  2020.

Heterogeneous IMAC Architecture

Talks/Presentations


SPX64: A Scratchpad Memory for General-Purpose Microprocessors, Abhishek Singh, Shail Dave, PanteA Zardoshti, Robert Brotzman, Chao Zhang, Xiaochen Guo, Aviral Shrivastava, Gang Tan, and Michael Spear, The 16th Conference on High Performance and Embedded Applications and Code Optimizations (HiPEAC), Jan 2021

Positions


Reviewer: ICCD’24, TACO

PC member for 9th Edition EMC2 co-located with ASPLOS 2024 in San Diego, USA

SoC Performance Architect (May 2023-present), Samsung SARC/ACL, Samsung Electronics, San Jose, USA

SoC Performance Architect Intern (November 2021-July 2022), Intel, Oregon, USA

Graduate Researcher Assistant, Computer Architecture Laboratory  (July 2018-May 2023), Lehigh University, Bethlehem, Pennsylvania, USA.

Graduate Researcher Assistant, Advanced Computer Architecture Laboratory  (Jan 2017-May 2017; Sept 2017-May 2018), University of Rochester, Rochester, New York, USA.

Graduate Researcher Intern, Wireless Communications and Networking Group  (May 2017-Aug 2017), University of Rochester, Rochester, New York, USA.

Academic Tree


Xiaochen Guo, Ph.D. 2015, UoR

Engin Ipek, Ph.D. 2008, Cornell

José Martínez, Ph.D. 2002, UIUC

Josep Torrellas, Ph.D. 1992, Stanford

John Hennessy, Ph.D. 1977, SUNY Stony Brook

Dick Kieburtz, Ph.D. 1961, U. Washington

Akira Ishimaru, Ph.D. 1958, U. Washington

Gedaliah Held, Ph.D. 1954, U.C. Berkeley

Samuel Silver, Ph.D. 1940, MIT

John Slater, Ph.D. 1923, Harvard

Percy Bridgman, Ph.D. 1908, Harvard

Wallace Sabine, A.M. 1888, Harvard

John Trowbridge, S.D. 1873, Harvard

Joseph Lovering, A.B. 1833, Harvard

Benjamin Peirce, A.B. 1829, Harvard

Nathaniel Bowditch, M.A. 1802 (Honorary), Harvard

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